1. Field of the Invention
The disclosure relates to an impedance control field of semiconductor device, and more particularly, to a programmable impedance control circuit for automatically correcting an impedance mismatching.
2. Description of the Related Art
Typically, semiconductor devices include input and output (I/O) pins for transmitting data from/to the outside world, and a data output circuit such as data output buffer and driver circuit, to provide internal data to the outside world. In integrating the semiconductor devices into electrical appliances, pins are connected to transmission lines such as a printed wiring, etc. on a mounting substrate. These pins are needed to charge and discharge a floating capacitance or load capacitance as a parasitic capacitance existing on the mounting substrate. In this case, to appropriately transmit an output signal, an output impedance and an impedance of transmission line must be matched with each other, and to receive an input signal without distortion, an impedance of transmission line must be matched with an input impedance. The former is generally referred to as output impedance (ZQ) control, and the latter is referred to as chip termination (ZT) control. Generally, output impedance control is performed for an output driver and chip termination control is performed for an input terminator circuit.
In accordance with a trend toward higher operating speed of electrical appliances, a swing width of signals interfaced between semiconductor devices is getting reduced gradually, so as to substantially reduce a delay time taken in a signal transfer. However, the gradually-reduced signal swing width increases the influence of external noise, reducing signal-to-noise ratio. Furthermore, a reflection of output signal due to impedance mismatching at an interface terminal becomes critical. The impedance mismatching can be caused by external noise or changes of power source voltage, operating temperature and manufacturing process, etc. When impedance mismatching is caused by a non-smooth execution of output impedance ZQ control at an output terminal, an output signal from a semiconductor device may be distorted. If any semiconductor device receives the distorted output signal through an input terminal, a setup/hold fail or an input-level decision error, etc. may be caused.
In general, some semiconductor memory devices have employed an impedance control scheme to obtain an input/output impedance matching with external semiconductor devices. An example of programmable impedance control (PIC) circuit for performing such a programmable impedance control is disclosed in U.S. Pat. No. 6,307,424.
To execute an impedance control in an example of HSTL (High Speed Transceiver Logic) interface, a method using one extra pin is usually used to control to have a desired output impedance value within about a specification of decades of ohms (Ω). In a semiconductor memory device employing such a method, it may be difficult to exactly obtain a desired output impedance value required intact, due to changes of power source voltage, operating temperature or manufacturing process, etc. To solve that difficulty, it is necessary to adaptively correct an impedance value. An example of prior art for such impedance control methods is disclosed in U.S. Pat. No. 6,456,124, and will be described together with a description of the invention.
Assuming that an impedance control operation is to be executed at a section of, e.g., 40 to 50 ohm, then a designer of the circuit extensively designs a transistor array of FIG. 2A so that an impedance detector 10 within a PIC circuit referred to in FIG. 3 has a range of about 30 to 60 ohm. This design is to accommodate a PVT (Process, Voltage, Temperature) change when the transistor array is designed larger than a section of actually executed impedance. However, even if the design margin described above is provided, there may be a case in which a low impedance is not detected in a condition of low power source voltage as shown in FIGS. 1A and 1B. In particular, in a low power source voltage condition of, e.g., 1.14 V and 130 (° C.), a low impedance of about 40 ohm might not be detected, as shown in FIG. 1B. That is, the PIC circuit employs a binary or gray code to turn on or off an impedance detection transistor array shown in FIG. 2A and so obtains a desired impedance value. But, in controlling an impedance by using the transistor array type, the impedance is not changed in a linear shape but in non-linear shape as shown in FIGS. 2B and 2C, in conformity with an increase/decrease of control codes. In FIGS. 2B and 2C, a transverse axis indicates a control code value and a vertical axis designates an impedance value of an ohm unit. Thus, in case a margin is provided to a low impedance side due to a PVT change, relatively many codes are not used, namely, wasted. In other words, an impedance detection resolution becomes worse within a desired section. The detection resolution directly influences a large or small size of detection range, thus the resolution is not so improved even though control codes to control a transistor array increase.
Hence, designers find it difficult to enhance reliability of PIC circuit by widening an impedance range because of several burdens, such as an increase of control codes and a chip occupation area based on an extension of the transistor array.
Consequently there is a need to develop an improved technique to smoothly perform an impedance matching operation without extension of the transistor array and waste of control codes even if there are environment changes in the manufacturing process, power source voltage and operating temperature, etc.